Here if line goes low, A 2 AND gates of all the combinational circuits become active while A 1 gates become inactive. ![]() In order to convert PIPO register of Figure 1 into PIPO shift register, one has to modify its circuit by adding combinational circuit and control line as shown by Figure 2. However one has to note that the PIPO register shown in Figure 1 is not capable of shifting the data bits. This indicates that both data storage as well as data recovery occur at a single (and at the same) clock pulse in PIPO registers. Further, at the same instant, the bit stored in each individual flip-flop also appears at their respective output pins (Q 1 = D 1 Q 2 = D 2 … Q n = B n). Here each flip-flop stores an individual bit of the data in appearing as its input (FF 1 stores B 1 appearing at D 1 FF 2 stores B 2 appearing at D 2 … FF n stores B n appearing at D n) at the instant of first clock pulse. Figure 1 shows a PIPO register capable of storing n-bit input data word (Data in). ![]() Parallel In Parallel Out (PIPO) shift registers are the type of storage devices in which both data loading as well as data retrieval processes occur in parallel mode.
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